parallel adder
英 [ˈpærəlel ˈædə(r)]
美 [ˈpærəlel ˈædər]
网络 平行加法器; 并行加法器; 并加器
双语例句
- Research on a parallel adder with 4 binary addends and its interface
4个加数的并行加法器及扩展接口的研究 - To accelerate the adder, a new parallel integer addition algorithm-carry barrel adder algorithm was proposed.
为了提高加法器的运算速度，提出了一种新型并行整数加法算法&桶形整数加法算法。 - The Design and Analysis Of AC Voltage adjustment Device Controlling By Optocoupler Rlelay; parallel relay adder
光耦合固体继电器控制交流调压器的设计与分析并行继电器（式）加法器 - Research and Implementation of Parallel Prefix Adder
并行前缀加法器的研究与实现 - This paper introduces the design method of parallel adder. On the basis we design an adder by the adoption of carry skip algorithm with carry strength signals and implement, through logic synthesis and layout.
首先介绍了常用并行加法器的设计方法，并在此基础上采用带进位强度的跳跃进位算法，通过逻辑综合和布局布线设计出了一个加法器。 - A real time optical logic processor is presented, that can perform binary logic operations in parallel. Experimental result is given of the system as a half adder.
本文提出了一种能实时完成二进制逻辑运算的光学并行处理系统，并给出了作为半加法器的实验结果。 - In the first stage, the amplitude sequence of modulating signal is generated by addressing waveform memory and added by the frequency value of carrier wave in the adder. The parallel output of the adder is served as the frequency control word of the second phase accumulator.
在第一级寻址结构中产生的调制信号幅度序列和载波频率值在加法器中相加，并将相加的结果作为第二级相位累加器的频率控制字； - The logic operations of PD-LED are studied. and experiment of optical parallel carry lookahead adder for many bits is carried out, with satisfactory results.
研究了PD-LED的光电混合逻辑操作，利用PD&LED逻辑器件，从实验上验证了先行进位光学并行多位全加器，获得了满意的结果。 - Optoelectronic Parallel Adder/ Subtractor
光电并行加/减运算器 - Commonly used algorithm of parallel adders is Carry Look-ahead Adder ( CLA) algorithm.
通常使用的并行加法器算法是超前进位加法算法。 - The adder is the core of the ALU, and its performance greatly influence to the performance of the entire ALU, so we laid a strong emphasis on the design of sub-word parallel adder.
由于加法器是ALU单元的核心功能部件，它的性能决定着整个ALU单元的性能，所以本文主要对子字并行加法器进行了设计。